Magnum 2 | Memory Test Solution from Teradyne

Magnum 2

High Performance, Low Cost, High Efficiency, Parallel Memory Test Solution

Teradyne’s Magnum 2 test system delivers high throughput and high parallel test efficiency for high performance non-volatile memories, static RAM memories and logic devices.

AdvantagesApplicationsConfigurationsSystem OptionsSoftware

Advantages

Scalable Platform

Scales from low-channel count engineering solution to high-channel count production solution with superior throughput and high parallel test efficiency

Highly Parallel NOR/NAND Flash Device Test

  • Tests up to 80 NAND Flash devices with up to 16 device signal pins
  • Tests up to 20 NOR Flash devices with up to 64 device signal pins
  • Tests up to 160 serial Flash devices with up to 8 device signal pins

Dual Bank ECR

  • Includes hardware acceleration and RA processor
  • Simultaneous capture and scan reduces test time

Full Speed ECR

  • 800Mbps capture on all channels

Unique Data Behind Each Channel

DRAM eFuse and NAND Bad Block management per DUT

Logic Test Coverage

  • Mixed Patterns
  • Full APG with Topo Scrambling
  • Full Logic pattern sequencer with LVM vector memory per pin
  • APG + LVM sequences in the same pattern

Applications

Memory

  • NOR Flash
  • NAND Flash
  • SRAM
  • DRAM
  • MEMs

SOC

  • Microcontroller
  • Low-end SOC
  • Converters

Configurations

Magnum 2 EV

  • Self- contained, low-power engineering test system
  • For customer and Lab applications that require test program development and debug
  • Up to 128 digital I/O pins plus an option board (DPS, VRC, or MPAC)
  • Internal air compressor eliminates need for facility compressed air to operate the load board latch mechanics
  • Runs on standard 110 VAC power (220 VAC Europe)

Magnum 2 PV

  • Five-slot chassis supports up to 640 digital I/O pins in 128 pin increments
  • Can be configured with multiple DPS, VRC, or MPAC option boards matched with the appropriate number of digital I/O channels to meet the requirements for complex memory and logic applications

Magnum 2 SV

  • High-mix production solution
  • Up to 1,024 digital pins for parallel test
  • Final test and wafer sort production
  • Compatible with industry standard handlers and wafer prober, including hinge and column  manipulators

System Options

MPAC

  • Analog source and capture option
  • Available with 24- or 48-channels of source/capture/Vref
  • Voltage reference for multiple test applications including embedded converters
  • Integrated parametric measurement unit (PMU) available at any instrument channel

 

DPS

  • Option for testing low pin count devices that must be tested highly parallel
  • Maximize resource utilization and device parallelism
  • Available in 32- and 64-channel configurations

 

MPAC24/DPS32

  • Option is a combination of 24 MPAC channels and 32 DPS channels

 

TCALDX

  • High-throughput, low-cost digital channel calibration option
  • Hardware and software solution calibrates system faster than the “relay-tree” calibration technique

 

Traceability

  • NIST certified instruments to support traceability (Magnum 2 systems do not directly support NIST compliance)
  • For AC measurements, TCALDX port provides access to the internal crystal of Magnum 2’s AC sub-system, one per site assembly. The timing path is routed through a digital counter cable to a NIST Certified Stanford Research SR620 counter (or equivalent) to provide a path for AC traceability
  • For DC measurements, TCALDX port provides access to a reference voltage from Magnum 2’s DC sub-system. Reference voltage is sourced from each DP board on a site assembly and routed through a digital multimeter cable to a NIST certified Agilent 3458A multimeter (or equivalent) to provide a path for DC traceability

 

Interface Solutions
DIB’s, PIB’s, Loadboards, Calibration BD’s, DUT BD Stiffener Kits, Probe Card Stiffener Kits. Final Test Interfaces, Wafer Probe Interfaces, Docking Solutions, and Test Cell Integration

Software

MagnumUI Software is a DUT-Based Multi-Site Architecture that has been architected to provide test engineers with true device-oriented parallel test programming environment. A test engineer writes a test program for a single device and the systems hardware clones the tests into multiple sites automatically. Test programs developed on the Magnum 2 EV or Magnum 2 PV can be used on the production version of Magnum 2 to maximize parallel test. All the software tools are site savvy, enabling test engineers to investigate device performance, on any DUT site, as though it was a one-site tester.